ICARUS OS (Intelligent Cooperative Architecture for Real-time Unified Systems) 0.1.0
Preemptive Real-Time Operating System for ARM Cortex-M7
Loading...
Searching...
No Matches
Macros
LSM9DS1_Infos
LSM9DS1

Macros

#define LSM9DS1_IMU_I2C_ADD_L   0xD5U
 I2C Device Address 8 bit format if SA0=0 -> 0xD5 if SA0=1 -> 0xD7.
 
#define LSM9DS1_IMU_I2C_ADD_H   0xD7U
 
#define LSM9DS1_MAG_I2C_ADD_L   0x39U
 I2C Device Address 8 bit format if SA0=0 -> 0x3D if SA0=1 -> 0x39.
 
#define LSM9DS1_MAG_I2C_ADD_H   0x3DU
 
#define LSM9DS1_IMU_ID   0x68U
 Device Identification (Who am I)
 
#define LSM9DS1_MAG_ID   0x3DU
 Device Identification (Who am I)
 

Detailed Description

Macro Definition Documentation

◆ LSM9DS1_IMU_I2C_ADD_H

#define LSM9DS1_IMU_I2C_ADD_H   0xD7U

Definition at line 173 of file lsm9ds1_reg.h.

◆ LSM9DS1_IMU_I2C_ADD_L

#define LSM9DS1_IMU_I2C_ADD_L   0xD5U

I2C Device Address 8 bit format if SA0=0 -> 0xD5 if SA0=1 -> 0xD7.

Definition at line 172 of file lsm9ds1_reg.h.

◆ LSM9DS1_IMU_ID

#define LSM9DS1_IMU_ID   0x68U

Device Identification (Who am I)

Definition at line 180 of file lsm9ds1_reg.h.

◆ LSM9DS1_MAG_I2C_ADD_H

#define LSM9DS1_MAG_I2C_ADD_H   0x3DU

Definition at line 177 of file lsm9ds1_reg.h.

◆ LSM9DS1_MAG_I2C_ADD_L

#define LSM9DS1_MAG_I2C_ADD_L   0x39U

I2C Device Address 8 bit format if SA0=0 -> 0x3D if SA0=1 -> 0x39.

Definition at line 176 of file lsm9ds1_reg.h.

◆ LSM9DS1_MAG_ID

#define LSM9DS1_MAG_ID   0x3DU

Device Identification (Who am I)

Definition at line 183 of file lsm9ds1_reg.h.