mpu.c File Reference

Memory Protection Unit Configuration. More...

#include "bsp/mpu.h"
#include "stm32h7xx.h"

Go to the source code of this file.

Functions
void	MPU_Config (void)
	Configure Memory Protection Unit regions.
void	MPU_ConfigureTaskData (uint32_t task_data_base)
	Configure MPU region 4 for the current task's data section.

Detailed Description

Memory Protection Unit Configuration.

Version

0.1.0

Configures MPU regions for unprivileged task execution (CONTROL=0x03).

     Region map:
     | # | Name          | Base       | Size  | Access              |
     |---|---------------|------------|-------|---------------------|
     | 0 | ITCM base     | 0x00000000 | 64KB  | Priv+User RO+exec   |
     | 1 | QSPI flash    | 0x90000000 | 8MB   | Priv+User RO+exec   |
     | 2 | Internal Flash| 0x08000000 | 128KB | Priv+User RO+exec   |
     | 3 | DTCM_OBC      | 0x20010000 | 64KB  | Priv+User RW         |
     | 4 | Task data     | dynamic    | 2KB   | Priv+User RW        |
     | 5 | DTCM          | 0x20000000 | 128KB | Priv RW (lower 64K) |
     | 6 | RAM_D1        | 0x24000000 | 512KB | Priv+User Full      |
     | 7 | Peripherals   | 0x40000000 | 512MB | Priv+User Device    |

     * Region 3 uses subregion disable (0xFC) to only protect the first
       256 bytes (subregions 0-1: 0x000–0x1FF) where kernel handlers
       live. Subregions 2-7 (0x200–0x3FF) fall back to region 0
       (PRIV_RO_URO) because C library code may read from the linker
       padding area in unprivileged mode.

     DTCM protection (Step 7b complete): All kernel data reads/writes
     use SVC call gates, so unprivileged tasks cannot corrupt kernel
     state (task_list, semaphore_list, message_pipe_list, os_tick_count).

Author

Souham Biswas

Date

2025

Copyright

Copyright 2025-2026 Souham Biswas https://github.com/ironhide23586/icarus-os-core Licensed under the Apache License, Version 2.0

Definition in file mpu.c.

Function Documentation

MPU_Config()

void MPU_Config

(

void

)

Configure Memory Protection Unit regions.

Sets up 8 MPU regions for memory protection:

• Region 0: ITCM (read-only for all, prevents code modification)
• Region 1: QSPI Flash (read-only, cacheable)
• Region 2: Internal Flash (read-only, cacheable)
• Region 3: DISABLED (consolidated with Region 0)
• Region 4: Task Data (dynamic, configured per context switch)
• Region 5: DTCM (privileged-only, protects kernel data)
• Region 6: RAM_D1 (shared buffers, full access)
• Region 7: Peripherals (device memory, full access)

Enables MPU with privileged default background map to block unprivileged access to system control space (NVIC, SCB, etc.)

Note

Called once during system initialization before tasks start

Memory barriers (DSB/ISB) ensure MPU changes take effect

Definition at line 64 of file mpu.c.

References BSP_DTCM_BASE, BSP_DTCM_OBC_BASE, BSP_FLASH_BASE, BSP_ITCM_BASE, BSP_PERIPH_BASE, BSP_RAM_D1_BASE, MPU_REGION_DTCM, MPU_REGION_DTCM_OBC, MPU_REGION_FLASH, MPU_REGION_ITCM_BASE, MPU_REGION_PERIPH, MPU_REGION_QSPI_FLASH, and MPU_REGION_RAM_D1.

Referenced by hal_init().

MPU_ConfigureTaskData()

void MPU_ConfigureTaskData

(

uint32_t

task_data_base

)

Configure MPU region 4 for the current task's data section.

Configure MPU Region 4 for current task's data region.

Parameters

task_data_base

Base address of the task's data pool

Note

Called from assembly context switch handler (os_yield_pendsv)

Definition at line 204 of file mpu.c.

References MPU_REGION_TASK_DATA, and TASK_DATA_SIZE_MPU.