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ICARUS OS (Intelligent Cooperative Architecture for Real-time Unified Systems) 0.1.0
Preemptive Real-Time Operating System for ARM Cortex-M7
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This section groups all the functions that manage interrupt pins. More...
Functions | |
| int32_t | lsm9ds1_pin_logic_set (const stmdev_ctx_t *ctx, lsm9ds1_pin_logic_t val) |
| AND/OR combination of accelerometer’s interrupt events. | |
| int32_t | lsm9ds1_pin_logic_get (const stmdev_ctx_t *ctx, lsm9ds1_pin_logic_t *val) |
| AND/OR combination of accelerometer’s interrupt events. | |
| int32_t | lsm9ds1_pin_int1_route_set (const stmdev_ctx_t *ctx, lsm9ds1_pin_int1_route_t val) |
| Route a signal on INT 1_A/G pin. | |
| int32_t | lsm9ds1_pin_int1_route_get (const stmdev_ctx_t *ctx, lsm9ds1_pin_int1_route_t *val) |
| Route a signal on INT 1_A/G pin. | |
| int32_t | lsm9ds1_pin_int2_route_set (const stmdev_ctx_t *ctx, lsm9ds1_pin_int2_route_t val) |
| Route a signal on INT 2_A/G pin. | |
| int32_t | lsm9ds1_pin_int2_route_get (const stmdev_ctx_t *ctx, lsm9ds1_pin_int2_route_t *val) |
| Route a signal on INT 2_A/G pin. | |
| int32_t | lsm9ds1_pin_notification_set (const stmdev_ctx_t *ctx_mag, stmdev_ctx_t *ctx_imu, lsm9ds1_lir_t val) |
| Latched/pulsed interrupt. | |
| int32_t | lsm9ds1_pin_notification_get (const stmdev_ctx_t *ctx_mag, stmdev_ctx_t *ctx_imu, lsm9ds1_lir_t *val) |
| Configure the interrupt notification mode. | |
| int32_t | lsm9ds1_pin_mode_set (const stmdev_ctx_t *ctx, lsm9ds1_pp_od_t val) |
| Push-pull/open drain selection on interrupt pads. | |
| int32_t | lsm9ds1_pin_mode_get (const stmdev_ctx_t *ctx, lsm9ds1_pp_od_t *val) |
| Push-pull/open drain selection on interrupt pads. | |
| int32_t | lsm9ds1_pin_int_m_route_set (const stmdev_ctx_t *ctx, lsm9ds1_pin_m_route_t val) |
| Route a signal on INT_M pin. | |
| int32_t | lsm9ds1_pin_int_m_route_get (const stmdev_ctx_t *ctx, lsm9ds1_pin_m_route_t *val) |
| Route a signal on INT_M pin. | |
| int32_t | lsm9ds1_pin_polarity_set (const stmdev_ctx_t *ctx_mag, stmdev_ctx_t *ctx_imu, lsm9ds1_polarity_t val) |
| Configure the interrupt pin polarity. | |
| int32_t | lsm9ds1_pin_polarity_get (const stmdev_ctx_t *ctx_mag, stmdev_ctx_t *ctx_imu, lsm9ds1_polarity_t *val) |
| Configure the interrupt pin polarity. | |
This section groups all the functions that manage interrupt pins.
| int32_t lsm9ds1_pin_int1_route_get | ( | const stmdev_ctx_t * | ctx, |
| lsm9ds1_pin_int1_route_t * | val | ||
| ) |
Route a signal on INT 1_A/G pin.
[get]
| ctx | Read / write interface definitions.(ptr) |
| val | Accelerometer data ready on INT 1_A/G pin.(ptr) |
| Interface | status (MANDATORY: return 0 -> no Error). |
Definition at line 2837 of file lsm9ds1_reg.c.
References lsm9ds1_int1_ctrl_t::int1_boot, lsm9ds1_pin_int1_route_t::int1_boot, lsm9ds1_int1_ctrl_t::int1_drdy_g, lsm9ds1_pin_int1_route_t::int1_drdy_g, lsm9ds1_int1_ctrl_t::int1_drdy_xl, lsm9ds1_pin_int1_route_t::int1_drdy_xl, lsm9ds1_int1_ctrl_t::int1_fss5, lsm9ds1_pin_int1_route_t::int1_fss5, lsm9ds1_int1_ctrl_t::int1_fth, lsm9ds1_pin_int1_route_t::int1_fth, lsm9ds1_int1_ctrl_t::int1_ig_g, lsm9ds1_pin_int1_route_t::int1_ig_g, lsm9ds1_int1_ctrl_t::int1_ig_xl, lsm9ds1_pin_int1_route_t::int1_ig_xl, lsm9ds1_int1_ctrl_t::int1_ovr, lsm9ds1_pin_int1_route_t::int1_ovr, LSM9DS1_INT1_CTRL, and lsm9ds1_read_reg().
| int32_t lsm9ds1_pin_int1_route_set | ( | const stmdev_ctx_t * | ctx, |
| lsm9ds1_pin_int1_route_t | val | ||
| ) |
Route a signal on INT 1_A/G pin.
[set]
| ctx | Read / write interface definitions.(ptr) |
| val | Accelerometer data ready on INT 1_A/G pin. |
| Interface | status (MANDATORY: return 0 -> no Error). |
Definition at line 2805 of file lsm9ds1_reg.c.
References lsm9ds1_int1_ctrl_t::int1_boot, lsm9ds1_pin_int1_route_t::int1_boot, lsm9ds1_int1_ctrl_t::int1_drdy_g, lsm9ds1_pin_int1_route_t::int1_drdy_g, lsm9ds1_int1_ctrl_t::int1_drdy_xl, lsm9ds1_pin_int1_route_t::int1_drdy_xl, lsm9ds1_int1_ctrl_t::int1_fss5, lsm9ds1_pin_int1_route_t::int1_fss5, lsm9ds1_int1_ctrl_t::int1_fth, lsm9ds1_pin_int1_route_t::int1_fth, lsm9ds1_int1_ctrl_t::int1_ig_g, lsm9ds1_pin_int1_route_t::int1_ig_g, lsm9ds1_int1_ctrl_t::int1_ig_xl, lsm9ds1_pin_int1_route_t::int1_ig_xl, lsm9ds1_int1_ctrl_t::int1_ovr, lsm9ds1_pin_int1_route_t::int1_ovr, LSM9DS1_INT1_CTRL, lsm9ds1_read_reg(), and lsm9ds1_write_reg().
| int32_t lsm9ds1_pin_int2_route_get | ( | const stmdev_ctx_t * | ctx, |
| lsm9ds1_pin_int2_route_t * | val | ||
| ) |
Route a signal on INT 2_A/G pin.
[get]
| ctx | Read / write interface definitions.(ptr) |
| val | Accelerometer data ready on INT2_A/G pin.(ptr) |
| Interface | status (MANDATORY: return 0 -> no Error). |
Definition at line 2895 of file lsm9ds1_reg.c.
References lsm9ds1_int2_ctrl_t::int2_drdy_g, lsm9ds1_pin_int2_route_t::int2_drdy_g, lsm9ds1_int2_ctrl_t::int2_drdy_temp, lsm9ds1_pin_int2_route_t::int2_drdy_temp, lsm9ds1_int2_ctrl_t::int2_drdy_xl, lsm9ds1_pin_int2_route_t::int2_drdy_xl, lsm9ds1_int2_ctrl_t::int2_fss5, lsm9ds1_pin_int2_route_t::int2_fss5, lsm9ds1_int2_ctrl_t::int2_fth, lsm9ds1_pin_int2_route_t::int2_fth, lsm9ds1_int2_ctrl_t::int2_inact, lsm9ds1_pin_int2_route_t::int2_inact, lsm9ds1_int2_ctrl_t::int2_ovr, lsm9ds1_pin_int2_route_t::int2_ovr, LSM9DS1_INT2_CTRL, and lsm9ds1_read_reg().
| int32_t lsm9ds1_pin_int2_route_set | ( | const stmdev_ctx_t * | ctx, |
| lsm9ds1_pin_int2_route_t | val | ||
| ) |
Route a signal on INT 2_A/G pin.
[set]
| ctx | Read / write interface definitions.(ptr) |
| val | Accelerometer data ready on INT2_A/G pin. |
| Interface | status (MANDATORY: return 0 -> no Error). |
Definition at line 2864 of file lsm9ds1_reg.c.
References lsm9ds1_int2_ctrl_t::int2_drdy_g, lsm9ds1_pin_int2_route_t::int2_drdy_g, lsm9ds1_int2_ctrl_t::int2_drdy_temp, lsm9ds1_pin_int2_route_t::int2_drdy_temp, lsm9ds1_int2_ctrl_t::int2_drdy_xl, lsm9ds1_pin_int2_route_t::int2_drdy_xl, lsm9ds1_int2_ctrl_t::int2_fss5, lsm9ds1_pin_int2_route_t::int2_fss5, lsm9ds1_int2_ctrl_t::int2_fth, lsm9ds1_pin_int2_route_t::int2_fth, lsm9ds1_int2_ctrl_t::int2_inact, lsm9ds1_pin_int2_route_t::int2_inact, lsm9ds1_int2_ctrl_t::int2_ovr, lsm9ds1_pin_int2_route_t::int2_ovr, LSM9DS1_INT2_CTRL, lsm9ds1_read_reg(), and lsm9ds1_write_reg().
| int32_t lsm9ds1_pin_int_m_route_get | ( | const stmdev_ctx_t * | ctx, |
| lsm9ds1_pin_m_route_t * | val | ||
| ) |
Route a signal on INT_M pin.
[get]
| ctx | Read / write interface definitions.(ptr) |
| val | Interrupt enable on the INT_M pin.(ptr) |
| Interface | status (MANDATORY: return 0 -> no Error). |
Definition at line 3110 of file lsm9ds1_reg.c.
References lsm9ds1_int_cfg_m_t::ien, lsm9ds1_pin_m_route_t::ien, LSM9DS1_INT_CFG_M, and lsm9ds1_read_reg().
| int32_t lsm9ds1_pin_int_m_route_set | ( | const stmdev_ctx_t * | ctx, |
| lsm9ds1_pin_m_route_t | val | ||
| ) |
Route a signal on INT_M pin.
[set]
| ctx | Read / write interface definitions.(ptr) |
| val | Interrupt enable on the INT_M pin. |
| Interface | status (MANDATORY: return 0 -> no Error). |
Definition at line 3085 of file lsm9ds1_reg.c.
References lsm9ds1_int_cfg_m_t::ien, lsm9ds1_pin_m_route_t::ien, LSM9DS1_INT_CFG_M, lsm9ds1_read_reg(), and lsm9ds1_write_reg().
| int32_t lsm9ds1_pin_logic_get | ( | const stmdev_ctx_t * | ctx, |
| lsm9ds1_pin_logic_t * | val | ||
| ) |
AND/OR combination of accelerometer’s interrupt events.
[get]
| ctx | Read / write interface definitions.(ptr) |
| val | Get the values of aoi_xl in reg INT_GEN_CFG_XL.(ptr) |
| Interface | status (MANDATORY: return 0 -> no Error). |
Definition at line 2763 of file lsm9ds1_reg.c.
References lsm9ds1_int_gen_cfg_g_t::aoi_g, lsm9ds1_int_gen_cfg_xl_t::aoi_xl, LSM9DS1_INT_GEN_CFG_G, LSM9DS1_INT_GEN_CFG_XL, LSM9DS1_LOGIC_AND, LSM9DS1_LOGIC_OR, and lsm9ds1_read_reg().
| int32_t lsm9ds1_pin_logic_set | ( | const stmdev_ctx_t * | ctx, |
| lsm9ds1_pin_logic_t | val | ||
| ) |
AND/OR combination of accelerometer’s interrupt events.
[set]
| ctx | Read / write interface definitions.(ptr) |
| val | Change the values of "aoi_xl" in reg LSM9DS1. |
| Interface | status (MANDATORY: return 0 -> no Error). |
Definition at line 2722 of file lsm9ds1_reg.c.
References lsm9ds1_int_gen_cfg_g_t::aoi_g, lsm9ds1_int_gen_cfg_xl_t::aoi_xl, LSM9DS1_INT_GEN_CFG_G, LSM9DS1_INT_GEN_CFG_XL, lsm9ds1_read_reg(), and lsm9ds1_write_reg().
| int32_t lsm9ds1_pin_mode_get | ( | const stmdev_ctx_t * | ctx, |
| lsm9ds1_pp_od_t * | val | ||
| ) |
Push-pull/open drain selection on interrupt pads.
[get]
| ctx | Read / write interface definitions.(ptr) |
| val | Get the values of pp_od in reg CTRL_REG8.(ptr) |
| Interface | status (MANDATORY: return 0 -> no Error). |
Definition at line 3052 of file lsm9ds1_reg.c.
References LSM9DS1_CTRL_REG8, LSM9DS1_OPEN_DRAIN, LSM9DS1_PUSH_PULL, lsm9ds1_read_reg(), and lsm9ds1_ctrl_reg8_t::pp_od.
| int32_t lsm9ds1_pin_mode_set | ( | const stmdev_ctx_t * | ctx, |
| lsm9ds1_pp_od_t | val | ||
| ) |
Push-pull/open drain selection on interrupt pads.
[set]
| ctx | Read / write interface definitions.(ptr) |
| val | Change the values of "pp_od" in reg LSM9DS1. |
| Interface | status (MANDATORY: return 0 -> no Error). |
Definition at line 3028 of file lsm9ds1_reg.c.
References LSM9DS1_CTRL_REG8, lsm9ds1_read_reg(), lsm9ds1_write_reg(), and lsm9ds1_ctrl_reg8_t::pp_od.
| int32_t lsm9ds1_pin_notification_get | ( | const stmdev_ctx_t * | ctx_mag, |
| stmdev_ctx_t * | ctx_imu, | ||
| lsm9ds1_lir_t * | val | ||
| ) |
Configure the interrupt notification mode.
[get]
| ctx_mag | Read / write magnetometer interface definitions.(ptr) |
| ctx_imu | Read / write imu interface definitions.(ptr) |
| val | Get the values of iel in reg INT_CFG_M.(ptr) |
| Interface | status (MANDATORY: return 0 -> no Error). |
Definition at line 2979 of file lsm9ds1_reg.c.
References lsm9ds1_int_cfg_m_t::iel, lsm9ds1_int_gen_cfg_g_t::lir_g, lsm9ds1_ctrl_reg4_t::lir_xl1, LSM9DS1_CTRL_REG4, LSM9DS1_INT_CFG_M, LSM9DS1_INT_GEN_CFG_G, LSM9DS1_INT_LATCHED, LSM9DS1_INT_PULSED, and lsm9ds1_read_reg().
| int32_t lsm9ds1_pin_notification_set | ( | const stmdev_ctx_t * | ctx_mag, |
| stmdev_ctx_t * | ctx_imu, | ||
| lsm9ds1_lir_t | val | ||
| ) |
Latched/pulsed interrupt.
[set]
| ctx_mag | Read / write magnetometer interface definitions.(ptr) |
| ctx_imu | Read / write imu interface definitions.(ptr) |
| val | Change the values of "lir_xl1" in reg LSM9DS1. |
| Interface | status (MANDATORY: return 0 -> no Error). |
Definition at line 2922 of file lsm9ds1_reg.c.
References lsm9ds1_int_cfg_m_t::iel, lsm9ds1_int_gen_cfg_g_t::lir_g, lsm9ds1_ctrl_reg4_t::lir_xl1, LSM9DS1_CTRL_REG4, LSM9DS1_INT_CFG_M, LSM9DS1_INT_GEN_CFG_G, lsm9ds1_read_reg(), and lsm9ds1_write_reg().
| int32_t lsm9ds1_pin_polarity_get | ( | const stmdev_ctx_t * | ctx_mag, |
| stmdev_ctx_t * | ctx_imu, | ||
| lsm9ds1_polarity_t * | val | ||
| ) |
Configure the interrupt pin polarity.
[get]
| ctx_mag | Read / write magnetometer interface definitions.(ptr) |
| ctx_imu | Read / write imu interface definitions.(ptr) |
| val | Get the values of iea in reg INT_CFG_M.(ptr) |
| Interface | status (MANDATORY: return 0 -> no Error). |
Definition at line 3174 of file lsm9ds1_reg.c.
References lsm9ds1_ctrl_reg8_t::h_lactive, lsm9ds1_int_cfg_m_t::iea, LSM9DS1_ACTIVE_HIGH, LSM9DS1_ACTIVE_LOW, LSM9DS1_CTRL_REG8, LSM9DS1_INT_CFG_M, and lsm9ds1_read_reg().
| int32_t lsm9ds1_pin_polarity_set | ( | const stmdev_ctx_t * | ctx_mag, |
| stmdev_ctx_t * | ctx_imu, | ||
| lsm9ds1_polarity_t | val | ||
| ) |
Configure the interrupt pin polarity.
[set]
| ctx_mag | Read / write magnetometer interface definitions.(ptr) |
| ctx_imu | Read / write imu interface definitions.(ptr) |
| val | Change the values of "iea" in reg LSM9DS1. |
| Interface | status (MANDATORY: return 0 -> no Error). |
Definition at line 3131 of file lsm9ds1_reg.c.
References lsm9ds1_ctrl_reg8_t::h_lactive, lsm9ds1_int_cfg_m_t::iea, LSM9DS1_CTRL_REG8, LSM9DS1_INT_CFG_M, lsm9ds1_read_reg(), and lsm9ds1_write_reg().