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ICARUS OS (Intelligent Cooperative Architecture for Real-time Unified Systems) 0.1.0
Preemptive Real-Time Operating System for ARM Cortex-M7
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Independent Watchdog (IWDG1) implementation. More...
Go to the source code of this file.
Macros | |
| #define | IWDG_KEY_ENABLE 0xCCCCu |
| #define | IWDG_KEY_REFRESH 0xAAAAu |
| #define | IWDG_KEY_UNLOCK 0x5555u |
Functions | |
| void | IWDG_Init (uint8_t prescaler, uint16_t reload) |
| Configure and start the independent watchdog. | |
| void | IWDG_Refresh (void) |
| Reload the watchdog counter ("kick" / "feed"). | |
| bool | IWDG_WasReset (void) |
| Was the most recent reset caused by the IWDG? | |
| void | IWDG_ClearResetFlag (void) |
| Clear the IWDG reset flag in RCC->RSR. | |
Independent Watchdog (IWDG1) implementation.
Direct CMSIS register access — the HAL IWDG module is left disabled in stm32h7xx_hal_conf.h to avoid pulling in the full HAL_IWDG state machine for what amounts to four register writes.
Register cheat-sheet (RM0433 §50):
IWDG1->KR write key register 0xCCCC = enable 0xAAAA = refresh (reload counter from RLR) 0x5555 = unlock PR/RLR/WINR for write access
IWDG1->PR 3-bit prescaler field [0..6] → div 4..256 IWDG1->RLR 12-bit reload value [1..4095] IWDG1->SR status: PVU (PR write pending), RVU (RLR pending), WVU (WINR pending) — must be 0 before we touch PR/RLR
The reset-reason side reads RCC->RSR (System Reset Status & Control Register on H7) — bit IWDG1RSTF tells us the previous boot was triggered by IWDG1. Cleared via the RMVF bit.
Definition in file iwdg.c.
| void IWDG_ClearResetFlag | ( | void | ) |
| void IWDG_Init | ( | uint8_t | prescaler, |
| uint16_t | reload | ||
| ) |
Configure and start the independent watchdog.
| prescaler | One of the IWDG_PRESCALER_* values (3-bit PR field). |
| reload | 12-bit reload value (1..4095). Total timeout is (reload + 1) × prescaler_div / LSI. |
Definition at line 44 of file iwdg.c.
References IWDG_KEY_ENABLE, IWDG_KEY_REFRESH, IWDG_KEY_UNLOCK, and IWDG_PRESCALER_256.
| void IWDG_Refresh | ( | void | ) |
Reload the watchdog counter ("kick" / "feed").
Definition at line 70 of file iwdg.c.
References IWDG_KEY_REFRESH.
| bool IWDG_WasReset | ( | void | ) |
Was the most recent reset caused by the IWDG?
true if the IWDGRST flag in RCC->RSR was set on this boot, false otherwise. The flag is sticky until cleared with IWDG_ClearResetFlag(), so this query is safe to call any number of times.