ICARUS OS (Intelligent Cooperative Architecture for Real-time Unified Systems) 0.1.0
Preemptive Real-Time Operating System for ARM Cortex-M7
Loading...
Searching...
No Matches
Functions
retarget_hal.c File Reference

ICARUS OS Hardware Abstraction Layer Implementation. More...

#include "bsp/retarget_hal.h"
#include "bsp/error.h"

Go to the source code of this file.

Functions

static void SystemClock_Config (void)
 Configure system clocks for 480MHz operation.
 
uint32_t task_active_sleep (uint32_t ticks)
 Sleep for specified ticks (cooperative, via SVC)
 
int32_t platform_write (void *handle, uint8_t reg, const uint8_t *bufp, uint16_t len)
 Platform write function for LSM9DS1 IMU driver.
 
int32_t platform_read (void *handle, uint8_t reg, uint8_t *bufp, uint16_t len)
 Platform read function for LSM9DS1 IMU driver.
 
static void CPU_CACHE_Enable (void)
 Enable CPU instruction and data caches.
 
void LED_Blink (uint32_t Hdelay, uint32_t Ldelay)
 Blink LED with specified on/off timing.
 
void LED_On (void)
 Turn LED on (active high)
 
void LED_Off (void)
 Turn LED off.
 
void hal_init (void)
 Initialize all hardware abstraction layer components.
 

Detailed Description

ICARUS OS Hardware Abstraction Layer Implementation.

Version
0.1.0

Provides hardware initialization and low-level platform services for the STM32H750VBT6 target. Includes:

  • MPU configuration for QSPI flash access
  • CPU cache enablement (I-Cache, D-Cache)
  • System clock configuration (480MHz)
  • Peripheral initialization
  • LED control functions
  • I2C platform read/write for IMU
Clock Configuration:
  • SYSCLK: 480 MHz (from PLL)
  • HCLK: 240 MHz (AHB)
  • APB1/APB2/APB3/APB4: 120 MHz
  • HSE: 25 MHz external crystal
  • RTC: driven from LSI (see rtc.c; avoids fragile LSE after warm reset)
Memory Protection:
  • Region 0: QSPI 256MB - No access (background)
  • Region 1: QSPI 8MB - Read-only, cacheable, executable
See also
STM32H750 Reference Manual RM0433
docs/do178c/design/SDD.md Section 3 - Hardware Abstraction
Author
Souham Biswas
Date
2025
Copyright
Copyright 2025-2026 Souham Biswas https://github.com/ironhide23586/icarus-os-core Licensed under the Apache License, Version 2.0

Definition in file retarget_hal.c.

Function Documentation

◆ CPU_CACHE_Enable()

static void CPU_CACHE_Enable ( void  )
static

Enable CPU instruction and data caches.

Enables both I-Cache and D-Cache for improved performance. Must be called after MPU configuration to ensure proper cacheability attributes are in effect.

Precondition
MPU_Config() must be called first
Postcondition
I-Cache and D-Cache enabled
Note
Cache coherency must be managed for DMA operations
See also
ARMv7-M Architecture Reference Manual, Section B2.2 (Caches)

Definition at line 66 of file retarget_hal.c.

Referenced by hal_init().

◆ hal_init()

void hal_init ( void  )

Initialize all hardware abstraction layer components.

Master initialization function that configures all hardware:

  1. Vector table relocation (if running from QSPI)
  2. MPU configuration for memory protection
  3. CPU cache enablement
  4. HAL library initialization
  5. System clock configuration (480MHz)
  6. GPIO initialization
  7. RTC initialization
  8. SPI4 initialization (LCD)
  9. TIM1 initialization (PWM)
  10. I2C2 initialization (IMU)
  11. USB CDC initialization
Precondition
None (called at system startup)
Postcondition
All hardware ready for kernel initialization
Note
Must be called before os_init()
USB may take up to 1 second to enumerate on host
See also
SystemClock_Config() for clock tree details

Definition at line 201 of file retarget_hal.c.

References BSP_FLASH_BASE, CPU_CACHE_Enable(), MPU_Config(), MX_GPIO_Init(), MX_I2C2_Init(), MX_RTC_Init(), MX_SPI4_Init(), MX_TIM1_Init(), MX_USB_DEVICE_Init(), and SystemClock_Config().

Referenced by main().

◆ LED_Blink()

void LED_Blink ( uint32_t  Hdelay,
uint32_t  Ldelay 
)

Blink LED with specified on/off timing.

Blink LED with specified timing.

Turns LED on for specified duration, then off for specified duration. Uses task_active_sleep() for non-blocking delays.

Parameters
[in]HdelayLED on duration in OS ticks
[in]LdelayLED off duration in OS ticks
Precondition
GPIO must be initialized (MX_GPIO_Init called)
Must be called from task context (uses task_active_sleep)
Note
Total blink period = Hdelay + Ldelay ticks

Definition at line 93 of file retarget_hal.c.

References E3_GPIO_Port, E3_Pin, and task_active_sleep().

Referenced by main(), and os_heartbeat_task().

◆ LED_Off()

void LED_Off ( void  )

Turn LED off.

Sets PE3 GPIO pin low to turn off the onboard LED.

Precondition
GPIO must be initialized

Definition at line 118 of file retarget_hal.c.

References E3_GPIO_Port, and E3_Pin.

Referenced by os_heartbeat_task().

◆ LED_On()

void LED_On ( void  )

Turn LED on (active high)

Turn LED on.

Sets PE3 GPIO pin high to illuminate the onboard LED.

Precondition
GPIO must be initialized

Definition at line 107 of file retarget_hal.c.

References E3_GPIO_Port, and E3_Pin.

Referenced by os_heartbeat_task().

◆ platform_read()

int32_t platform_read ( void *  handle,
uint8_t  reg,
uint8_t *  bufp,
uint16_t  len 
)

Platform read function for LSM9DS1 IMU driver.

Reads data from IMU register via I2C. Used by the LSM9DS1 driver library for sensor data acquisition.

Parameters
[in]handleI2C handle (cast to I2C_HandleTypeDef*)
[in]regRegister address to read
[out]bufpPointer to receive buffer
[in]lenNumber of bytes to read
Returns
0 on success (HAL status ignored for simplicity)
Note
Uses blocking I2C transfer with HAL_MAX_DELAY timeout

Definition at line 167 of file retarget_hal.c.

References IMU_ADDRESS.

◆ platform_write()

int32_t platform_write ( void *  handle,
uint8_t  reg,
const uint8_t *  bufp,
uint16_t  len 
)

Platform write function for LSM9DS1 IMU driver.

Writes data to IMU register via I2C. Used by the LSM9DS1 driver library for register configuration.

Parameters
[in]handleI2C handle (cast to I2C_HandleTypeDef*)
[in]regRegister address to write
[in]bufpPointer to data buffer
[in]lenNumber of bytes to write
Returns
0 on success (HAL status ignored for simplicity)
Note
Uses blocking I2C transfer with HAL_MAX_DELAY timeout

Definition at line 141 of file retarget_hal.c.

References IMU_ADDRESS.

◆ SystemClock_Config()

void SystemClock_Config ( void  )
static

Configure system clocks for 480MHz operation.

Configures the complete clock tree:

  • HSE: 25MHz external crystal
  • HSI48: 48MHz for USB
  • PLL: 480MHz SYSCLK from HSE
PLL Configuration:
  • Source: HSE (25MHz)
  • PLLM: 5 (VCO input = 5MHz)
  • PLLN: 96 (VCO output = 480MHz)
  • PLLP: 2 (SYSCLK = 480MHz)
Bus Clocks:
Bus Divider Frequency
SYSCLK /1 480 MHz
HCLK /2 240 MHz
APB1 /1 120 MHz
APB2 /1 120 MHz
APB3 /1 120 MHz
APB4 /1 120 MHz
Note
Calls Error_Handler() on configuration failure
See also
STM32H750 Reference Manual RM0433, Section 8 (RCC)

Supply configuration update enable

< Core domains are supplied from the LDO

Configure the main internal regulator output voltage

Initializes the RCC Oscillators according to the specified parameters in the RCC_OscInitTypeDef structure.

Note
LSE is intentionally excluded: it is not required for PLL/USB and can fail or stall after resets that retain the RTC backup domain (e.g. IWDG), which would trap the CPU in Error_Handler() before USB enumerates.

< Clock range frequency between 4 and 8 MHz

Initializes the CPU, AHB and APB buses clocks

< FLASH One Latency cycle

Definition at line 292 of file retarget_hal.c.

References Error_Handler().

Referenced by hal_init().

◆ task_active_sleep()

uint32_t task_active_sleep ( uint32_t  ticks)
extern

Sleep for specified ticks (cooperative, via SVC)

Sleep for specified ticks (cooperative)

Definition at line 522 of file svc.c.

Referenced by LED_Blink().